US 7,733,227 C1 (12,982nd)
RFID tags circuits and methods for sensing own power to predetermine feasibility of requested action
Alberto Pesaveto, Seattle, WA (US); Vadim Gutnik, Irvine, CA (US); and John D. Hyde, Corvallis, OR (US)
Filed by Alberto Pesaveto, Seattle, WA (US); Vadim Gutnik, Irvine, CA (US); and John D. Hyde, Corvallis, OR (US)
Assigned to IMPINJ INC, Seattle, WA (US)
Reexamination Request No. 90/019,404, Feb. 6, 2024.
Reexamination Certificate for Patent 7,733,227, issued Jun. 8, 2010, Appl. No. 11/624,197, Jan. 17, 2007.
Claims priority of provisional application 60/761,016, filed on Jan. 19, 2006.
Ex Parte Reexamination Certificate issued on Jul. 14, 2025.
Int. Cl. G06K 7/00 (2006.01); G06K 19/07 (2006.01); G06K 19/077 (2006.01)
CPC G06K 7/0008 (2013.01) [G06K 19/0707 (2013.01); G06K 19/0712 (2013.01); G06K 19/07749 (2013.01)]
OG exemplary drawing
AS A RESULT OF REEXAMINATION, IT HAS BEEN DETERMINED THAT:
Claims 38 and 43 are cancelled.
Claims 1-37, 39-42 and 44-76 were not reexamined.
38. A Radio Frequency Identification (RFID) circuit for use in an RFID tag, comprising:
a first circuit arranged to receive a command associated with a tag operation from an RFID reader; and
a second circuit arranged to determine, responsive to the received command, whether a power adequacy condition is met for performing the tag operation, and if so to perform the tag operation in response to the received command, else not to perform the tag operation.