| Class 326 | ELECTRONIC DIGITAL LOGIC CIRCUITRY |
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![[List of Pre Grant Publications for class 326 subclass 1]](../as.gif) | ![[List of Patents for class 326 subclass 1]](../ps.gif) | 1 | SUPERCONDUCTOR (E.G., CRYOGENIC, ETC.) |
| | 2 |  Tunneling device |
| | 7 | Function of AND, OR, NAND, NOR, or NOT |
| | 8 | SECURITY (E.G., ACCESS OR COPY PREVENTION, ETC.) |
| | 9 | RELIABILITY |
| | 16 | WITH TEST FACILITATING FEATURE |
| | 17 | ACCELERATING SWITCHING |
| | 21 | SIGNAL SENSITIVITY OR TRANSMISSION INTEGRITY |
| | 22 | Input noise margin enhancement |
| | 26 | Output switching noise reduction |
| | 29 | Pulse shaping (e.g., squaring, etc.) |
| | 30 | Bus or line termination (e.g., clamping, impedance matching, etc.) |
| | 31 | Signal level or switching threshold stabilization |
| | 35 | THRESHOLD (E.G., MAJORITY, MINORITY, OR WEIGHTED INPUTS, ETC.) |
| | 37 | MULTIFUNCTIONAL OR PROGRAMMABLE (E.G., UNIVERSAL, ETC.) |
| | 38 | Having details of setting or programming of interconnections or logic functions |
| | 39 | Array (e.g., PLA, PAL, PLD, etc.) |
| | 40 |  With flip-flop or sequential device |
| | 41 | Significant integrated structure, layout, or layout interconnections |
| | 42 | Bipolar transistor |
| | 44 | Field-effect transistor |
| | 46 | Sequential (i.e., finite state machine) or with flip-flop |
| | 47 | Significant integrated structure, layout, or layout interconnections |
| | 48 | Bipolar transistor |
| | 49 | Field-effect transistor |
| | 51 | INHIBITOR |
| | 52 | EXCLUSIVE FUNCTION (E.G., EXCLUSIVE OR, ETC.) |
| | 56 | TRI-STATE (I.E., HIGH IMPEDANCE AS THIRD STATE) |
| | 59 | THREE OR MORE ACTIVE LEVELS (E.G., TERNARY, QUATENARY, ETC.) |
| | 61 | INSULATED GATE CHARGE TRANSFER DEVICE |
| | 62 | INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT, ETC.) |
| | 63 | Logic level shifting (i.e., interface between devices of different logic families) |
| | 64 | Bi-CMOS |
| | 68 | Field-effect transistor (e.g., JFET, MOSFET, etc.) |
| | 69 |  ECL to/from GaAs FET (e.g., MESFET, etc.) |
| | 70 | TTL to/from MOS |
| | 73 | ECL to/from MOS |
| | 74 | ECL to/from TTL |
| | 75 | Bipolar transistor |
| | 80 | Supply voltage level shifting (i.e., interface between devices of a same logic family with different operating voltage levels) |
| | 82 | Current driving (e.g., fan in/out, off chip driving, etc.) |
| | 93 | CLOCKING OR SYNCHRONIZING OF LOGIC STAGES OR GATES |
| | 99 | HAVING LOGIC LEVELS CONVEYED BY SIGNAL FREQUENCY OR PHASE |
| | 100 | INTEGRATED INJECTION LOGIC |
| | 101 | SIGNIFICANT INTEGRATED STRUCTURE, LAYOUT, OR LAYOUT INTERCONNECTIONS |
| | 104 | FUNCTION OF AND, OR, NAND, NOR, OR NOT |
| | 105 | Decoding |
| | 109 | Bipolar and FET |
| | 111 | Space discharge device (e.g., vacuum tube, etc.) |
| | 112 | Field-effect transistor (e.g., JFET, etc.) |
| | 113 | Pass transistor logic or transmission gate logic |
| | 114 | Wired logic (e.g., wired-OR, wired-AND, dotted logic, etc.) |
| | 115 | Source-coupled logic (e.g., current mode logic (CML), differential current switch logic (DCSL), etc.) |
| | 116 | Schottky-gate FET (i.e., MESFET) |
| | 119 | MOSFET (i.e., metal-oxide semiconductor field-effect transistor) |
| | 122 | Complementary FETs |
| | 123 | With semiconductor diode or negative resistance device |
| | 124 | Bipolar transistor (e.g., RTL, DCTL, etc.) |
| | 125 | Wired logic or open collector logic (e.g., wired-OR, wired-AND, dotted logic, etc.) |
| | 126 | Emitter-coupled or emitter-follower logic |
| | 128 | Transistor-transistor logic (TTL) |
| | 130 | Diode-transistor logic (DTL) |
| | 132 | With negative resistance device (e.g., tunnel diode, thyristor, etc.) |
| | 133 | Diode |
| | 135 | Negative resistance device |
| | 136 | MISCELLANEOUS |
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| FOR000 | CLASS-RELATED FOREIGN DOCUMENTS |